Difference between revisions of "LogicAnalyser"
From Hackbox
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* so be careful with continuous mode: you get a brief chance to stop after each sample period (which can be long depending on the settings) | * so be careful with continuous mode: you get a brief chance to stop after each sample period (which can be long depending on the settings) | ||
* the sampling first waits for a trigger, i.e. a transition on the trigger channel. | * the sampling first waits for a trigger, i.e. a transition on the trigger channel. | ||
| + | |||
| + | ==To Do== | ||
| + | |||
| + | Possible improvements: | ||
| + | * [http://tfla-01.berlios.de/] | ||
| + | * [http://www.codeproject.com/KB/system/17ChannelLogicAnalyzer.aspx] | ||
Revision as of 02:58, 6 January 2011
Using the software and hardware described here:
- on the TransferPC
- using the suggested 75HC245 to protect the parallel port.
- only 2 probes
I've used these settings to debug the audio circuits of the MEK6800:
- trigger channel: 1 (I wish I could disable triggering)
- pre-trigger delay: 0
- sample size: 2000
- sample period: 2 (this is the resolution, but don't set to 1)
- granularity (read only): 1.65 us.
- zoom: length 5.28 ms
Caveats:
- while sampling, you cannot interact with the PC at all!
- so be careful with continuous mode: you get a brief chance to stop after each sample period (which can be long depending on the settings)
- the sampling first waits for a trigger, i.e. a transition on the trigger channel.
To Do
Possible improvements:
